1. Field of the Invention
The present invention relates to a demodulator and a demodulating method using a quasi-synchronous detection.
2. Description of the Related Art
A configuration of a conventional QAM (quadrature amplitude modulation) demodulator 50 is shown in FIG. 1.
The demodulator 50 includes a quadrature detector 1 for converting an intermediate frequency signal (IF), that is an inputted modulated signal, into two quadrature signals Ich and Qch, an oscillator 2 for transmitting periodical signals to the quadrature detector 1, low pass filters 3 and 4 for removing a high frequency component from the output of the quadrature detector 1 and taking out only the required quadrature component signals, amplifiers 5 and 6 for amplifying the quadrature signals Ich and Qch supplied from the low pass filters 3 and 4 to amplitudes large enough for reception by analog-to-digital (A/D) converters, A/D converters 7 and 8 for converting the two analog quadrature signals Ich and Qch into digital signals, an automatic gain control (AGC) circuit 9 for controlling the amplitude of either one of the two quadrature signals Ich and Qch supplied from the A/D converters 7 and 8, a phase-rotator 10 for rotating the phases of the two quadrature signals Ich and Qch supplied from the AGC circuit 9, and amplitude adjustors 11 and 12 for adjusting the amplitudes of the two quadrature signals Ich and Qch supplied from the phase-rotator 10 to prescribed amplitudes.
Supposing that the difference in gains between the two quadrature signals Ich and Qch arising in the analog section (the quadrature detector 1, the low pass filters 3 and 4, the amplifiers 5 and 6, and the A/D converters 7 and 8) is not corrected, the demodulated output will be affected and signal points around will expand as shown in FIG. 2, inviting a deterioration in error rate characteristic.
In order to prevent this, the demodulator 50 shown in FIG. 1 is provided with the AGC circuit 9. This AGC circuit 9 detects the relative amplitude levels of the two quadrature signals Ich and Qch, and cancels the gain difference arising in the analog section by controlling the amplitude of the quadrature signal Ich according to the result of detection.
A first typical configuration 9A of the AGC circuit 9 is shown in FIG. 3.
The AGC circuit 9A shown in FIG. 3 consists of a multiplier 27, a low pass filter 28, a comparator 29 and first and second absolute value circuits 30 and 31.
The first absolute value circuit 30 figures out the absolute value, i.e. the amplitude, of the quadrature signal Ich, and the second absolute value circuit 31 figures out the absolute value, i.e. the amplitude, of the quadrature signal Qch. The amplitudes of the two quadrature signals Ich and Qch figured out by the first and second absolute value circuits 30 and 31 are outputted to the comparator 29, which compares these two amplitudes. The low pass filter 28 integrates signals indicating the result of comparison, supplied by the comparator 29, into a control signal and transmits this control signal to the multiplier 27. The multiplier 27 corrects the quadrature signal Ich by multiplying the quadrature signal Ich by this control signal.
However, this involves the following problem.
The problem with this AGC circuit 9A is that it cannot exercise proper control if receive signals are under specific conditions.
This problem arises because, in the AGC circuit 9A, the comparator 29 compares the quadrature signals Ich and Qch at the same point of time. In a PSK operation or a QAM operation, the two quadrature signals Ich and Qch cannot take respectively independent values, therefore once the value of the quadrature signal Ich is determined, the value of the other quadrature signal Qch is restricted to a prescribed range.
Supposing a QPSK operation, the values of the two quadrature signals Ich and Qch before the phase-rotator 10 are shown in FIG. 4. Thus, the values that the quadrature signals Ich and Qch are limited to those on a circle 60 when the gain of the quadrature signal Ich is equal to that of the quadrature signal Qch, or to those on an oval 61 when the gain of the quadrature signal Ich is greater than that of the quadrature signal Qch.
In such a situation, comparing the amplitudes of the two quadrature signals Ich and Qch at the same point of time is equivalent to finding out which of areas A and B, having |Ichxe2x88x92Qch|=0 on the border between them, input signals will enter. In area A the amplitude of Ich is greater than that of Qch, while in area B the amplitude of Qch is greater than that of Ich.
Here is supposed a case in which the reception point is in a position shown in FIG. 5.
If there is no difference in gain by the analog circuits between the two quadrature signals Ich and Qch, the numbers of signal points entering into area A will be equal to those of signal points entering into area B, therefore no control will be performed.
If the gain of Ich is greater than that of Qch, signal points will enter into area A, and control will be performed for reducing the gain of Ich.
If, conversely, the gain of Qch is greater than that of Ich, signal points will enter into area B, and control will be performed for raising the gain of Ich.
Thus, as shown in FIG. 5, if the reception points are in the vicinity of straight lines I=xc2x1Q, control will be performed correctly.
However, when receive signals come in the positions shown in FIG. 6, if data are equally distributed among four areas which are divided by two straight lines I=xc2x1Q, the numbers of signal points entering into areas A and B will be equal. Therefore, even if there is an amplitude difference between Ich and Qch, no control will be performed.
As described above, the problem with the AGC circuit 9A shown in FIG. 3 is that sometimes control is not performed correctly because the signals Ich and Qch at the same point of time are not independent each other.
In this connection, AGC circuits to solve this problem are also proposed. An AGC circuit 9B shown in FIG. 7 is one of them.
This AGC circuit 9B includes a multiplier 32, a low pass filter 33, a comparator 34, first and second averaging circuits 35 and 36, and first and second absolute value circuits 37 and 38.
As will be described below, this AGC circuit 9B is so configured that it passes no judgment merely on the basis of a single symbol, but averages a certain number of signal points and controls on the basis of the average thereby obtained.
The first and second absolute value circuits 37 and 38 figure out respective amplitudes of the two quadrature signals Ich and Qch, and transmit the amplitudes figured out to the first and second averaging circuits 35 and 36, respectively.
Each of the first and second averaging circuits 35 and 36, upon receiving predetermined numbers of amplitudes, averages them and transmits the respective average amplitudes to the comparator 34.
The comparator 34 compares these two averages. The low pass filter 33 integrates signals indicating the result of comparison, supplied from the comparator 34, into a control signal, and transmits this control signal to the multiplier 32. The multiplier 32 corrects the quadrature signal Ich by multiplying the quadrature signal Ich by this control signal.
The AGC circuit 9B, as it can obtain amplitude information on the two quadrature signals Ich and Qch, can perform proper control in any situation.
However, if a circuit to supply N averages per symbol is to be configured for speeding up a control, all the values of N past inputs will have to be stored. If a large N value is set to improve the accuracy, the storage will be correspondingly increased. Therefore the scale of circuit will be vastly large.
FIG. 8 is a block diagram of another demodulator 51 according to the prior art.
The demodulator 51 shown in FIG. 8 includes a first AGC circuit 39 into which the two quadrature signals Ich and Qch are inputted, a converter 40, a phase-rotator 41, an NCO 42, a second AGC circuit 43, a third AGC circuit 44 and a detecting circuit 45.
The first AGC circuit 39 controls the amplitude of either one of the two quadrature signals Ich and Qch, and the phase-rotator 41 rotates the phases of the two quadrature signals Ich and Qch supplied from the first AGC circuit 39. The second AGC circuit 43 and the third AGC circuit 44 adjust the amplitudes of the two quadrature signals Ich and Qch supplied from the phase-rotator 41 to prescribed amplitudes.
Regarding signal points supplied from the second AGC circuit 43 and the third AGC circuit 44 the detecting circuit 45 detects deviations from the grid points where the receive signal points should be normally placed, and extracts components due to the gain difference between the two quadrature signals Ich and Qch out of those deviations, and delivers those components to the converter 40. The converter 40 rotates the two quadrature signals in the reverse direction to the rotation by the phase-rotator 41 to return them to their respective states before the phase rotation, and supplies the quadrature signals after this reverse rotation to the first AGC circuit 39 as the control signals.
In this configuration, another control circuit may be additionally inserted into a feedback circuit consisting of the first AGC circuit 39, the phase-rotator 41, the second AGC circuit 43, the third AGC circuit 44, the detecting circuit 45 and the converter 40, but in such a case the control may be prevented from being properly performed by interference between the newly added control circuit and the feedback circuit.
An object of the invention is to solve the above-noted problems of demodulators according to the prior art.
Therefore the present invention provides an AGC circuit and an AGC method which are controlled correctly in any situation without having a control by the use of averages or signals after phase rotation or having a comparision of the two quadrature signals Ich and Qch at the same point of time.
In order to achieve this object, the present invention provides an AGC circuit for digital wireless communication systems using a quadrature modulation, which compares the amplitudes of two inputted quadrature signals at mutually different points of time and, if there is a difference between those amplitudes, corrects the difference.
Further the present invention provides an AGC circuit having a multiplier, a low pass filter, a comparator, first and second absolute value circuits, and a delay circuit, wherein the multiplier multiplies a first quadrature signal by a signal supplied from the low pass filter, the first absolute value circuit figures out the amplitude of the signal supplied from the multiplier, the second absolute value circuit figures out the amplitude of a second quadrature signal, the delay circuit delays the output signal from the first absolute value circuit or the output signal from the second absolute value circuit by at least an equivalent of one symbol, the comparator compares the amplitude of the first quadrature signal and the amplitude of the second quadrature signal after the output signal is delayed by the delay circuit, and the low pass filter removes high frequency components from the output signal of the comparator.
The delay circuit can be configured of, for instance, a flip-flop circuit.
The low pass filter is provided with an up-down counter, which preferably should count up or down its count according to the output from the comparator.
The AGC circuit described above can be applied to, for instance, demodulators.
A typical configuration of such a demodulator may include a quadrature detector for converting entered intermediate frequency signals of a modulated wave into first and second quadrature signals; an analog-to-digital converter for converting the first and second quadrature signals, which are analog signals, into digital signals; an AGC circuit for comparing at mutually different points of time the amplitudes of first and second quadrature signals supplied from the analog-to-digital converter and, if there is a difference between those amplitudes, correcting the difference; and a phase-rotator for rotating the phases of the first and second quadrature signals supplied from the AGC circuit.
Also according to the present invention, there is provided an AGC method for signals in a digital wireless communication systems using a quadrature modulation having a step of delaying either of two inputted quadrature signals, a step of comparing the amplitudes of the two quadrature signals, and a step of correcting, if there is a difference between those amplitudes, the difference.
As described above, the AGC circuits and the AGC method can properly correct amplitude deviations under whatever phasic condition signals may be inputted.
The reason is as follows: Usually, in a quadrature modulation as QAM, transmission is performed without allowing correlation between successive signals. Therefore, as the amplitudes of two quadrature signals are compared at different points of time, their amplitudes can be compared correctly.
For this reason, whatever the relationship between the carrier frequency of input IF signals and the frequency of the oscillator may be, any amplitude difference between two quadrature signals that may arise in the analog circuit section can be automatically detected and corrected.